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21AP10Core Board/21AP10Base Board

Dev Boards & Modules · HiSilicon

Project: Board Introduction | page_id: 1663

Name 21AP10 Core Board
Board No. 21AP10-XSWCORE V10
CPU Hi3403V100
CPU Cores Quad-core 64-bit ARM Cortex-A55
GPU ARM Mali-G52
NPU Computing Power 10 TOPS (INT8)
DDR 8G
eMMC 16G
Supported System Linux system
Video Encoding Supports up to 4K@60fps encoding
Video Input 2-channel 4K30fps
Video Output HDMI 2.0 (supports 4K30 or 4K60 output), CVBS output
Interfaces 1-channel RS232, 1-channel RS485, multiple I2C, etc.
Storage TF card
Network RJ45 10/100/1000M, 4G
WIFI USB interface WiFi
Operating Temperature 0 to 70°C
Service Life Continuous operation life of more than 5 years

I. Product Images

①21AP10 Core Board

Core Board Size: 66*59mm


②21AP10 Base Board


Base Board Size: 198*155mm

II. Chip Specifications

Main Control Model: 21AP10 (Hi3403V100)

Description
Hi3403V100 is a professional Ultra-HD Smart IP Camera SoC launched for the surveillance market. This chip supports up to 4-channel sensor input, supports ISP image processing capability up to 4K60, and supports 3F WDR, multi-level noise reduction, six-axis anti-shake, hardware stitching and other image enhancement and processing algorithms, providing users with excellent image processing capabilities.
Features
Processor Core
• Quad-core ARM Cortex A55@1.4GHz - 32KB I-Cache, 32KB D-Cache / 512KB L3 cache - Supports Neon acceleration, integrated FPU processing unit • Built-in 32bit MCU@500MHz - 32KB I-Cache, 32KB D-Cache / 64KB TCM • Supports TrustZone

Intelligent Video Analysis
• Image analysis acceleration engine, up to 10.4Tops@INT8 computing power - Dual-core heterogeneous engine - Engine 1 supports 4.8Tops computing power, supports INT4/INT8/FP16 - Engine 2 supports 5.6Tops computing power, supports INT8/INT16 - Supports a complete API and tool chain, easy for customer development • Supports TrustZone - Supports USB3.0 and PCIe2.0 high-speed interfaces. • Dual-core Vision Q6 DSP - 32K I-Cache / 32K D-Cache / 32K IRAM / 320K DRAM • Built-in intelligent computing acceleration engine • Built-in binocular depth acceleration unit • Built-in matrix computing acceleration unit

Video Codec
• H.264 BP/MP/HP • H.265 Main Profile • Maximum H.264/H.265 encoding and decoding resolution is 8192 x 8192 • H.264/H.265 encoding supports I/P frames • H.264/H.265 multi-stream encoding capability: - 3840 x 2160@60fps + 1280x720@30fps - 7680 x 4320@15fps • H.264/H.265/MPEG-4 multi-stream decoding capability: - 3840 x 2160@60fps + 1920x1080@60fps • Supports OSD overlay for up to 8 areas before encoding • Supports CBR/VBR/AVBR/FIXQP/QPMAP and other bitrate control modes • Maximum output bitrate 160Mbps • Supports encoding of 8 regions of interest (ROI) • Supports JPEG Baseline encoding and decoding • Maximum JPEG encoding and decoding resolution 16384x16384 • Maximum JPEG performance - Encoding: 3840 x 2160@60fps (YUV420) - Decoding: 3840 x 2160@75fps (YUV420)

Video Input Interface
• Supports 8-Lane image sensor serial input, supports MIPI/LVDS/Sub-LVDS/HiSPi interfaces • Supports 2x4-Lane or 4x2-Lane and other combinations, up to 4-channel sensor serial input • Maximum resolution 8192 x 8192 • Supports 8/10/12/14 Bit RGB Bayer DC timing video input, with a clock frequency up to 150MHz • Supports BT.601, BT.656, BT.1120 video input interfaces • Supports mainstream CMOS level thermal imaging sensors

Digital Image Processing ISP
• The ISP supports time-division multiplexing processing of multiple sensor input videos • Supports 3A (AE/AWB/AF) functions, and the 3A control is user adjustable • Supports fixed pattern noise removal (FPN) • Supports bad point correction and lens shading correction • Supports up to three-frame WDR and Advanced Local Tone Mapping • Supports multi-level 3D denoising, image edge enhancement, defog, dynamic contrast enhancement and other processing functions • Supports 3D-LUT color adjustment • Supports lens distortion correction and fisheye correction • Supports 6-DoF digital image stabilization and Rolling-Shutter correction • Supports image mirror, flip, 90°/270° rotation • Provides a PC-side ISP tuning tool • Supports hyper-photosensitive noise reduction (HNR)

Video and Graphics Processing
• Supports graphics and image scaling from 1/15.5 to 16x • Supports up to 4-channel video panoramic stitching - Input 2 channels of 3840x2160, output 4320x3840 - Input 4 channels of 2688x1520, output 6080x2688 • Supports video layer and graphics layer overlay • Supports color space conversion
Video Output
• Supports HDMI2.0 interface output • Supports 4-Lane MIPI DSI/CSI interface output, up to 2.5Gbps/lane • Built-in analog standard-definition CVBS output • Supports 8/16/24 bit RGB, BT.656, BT.1120 and other digital interfaces • Supports 2 independent HD video outputs at the same time - Supports non-homologous output of any two interfaces - One of them can support PIP (Picture In Picture) • Maximum output capability 4096x2160@60fps + 1920x1080@60fps

Audio Interface and Processing
• Built-in audio codec, supports 16bit voice input and output • Supports I2S interface - Supports multi-channel time division multiplexing (TDM) • Supports HDMI Audio output • Multi-protocol voice codec implemented by software • Supports audio 3A (AEC/ANR/ALC) processing • Supports G.711/G.726/AAC and other audio encoding formats

Security Isolation and Engine
• Supports secure boot • Supports TrustZone-based REE/TEE hardware isolation - Hardware implementation of the AES symmetric encryption algorithm • Hardware implementation of the RSA2048/3072/4096 signature verification algorithm • Hardware implementation of HASH-based SHA/256/384/512 and HMAC_SHA256/384/512 algorithms • Hardware implementation of a random number generator • Integrated 30Kbit OTP storage space for customers

Network Interface
• 2 Gigabit Ethernet interfaces - Supports RGMII and RMII interface modes - Supports TSO, UFO, COE and other acceleration units - Supports Jumbo Frame

Peripheral Interfaces
• Supports power-on reset (POR) and external input reset • Integrated 4-channel LSADC • Multiple UART, I²C, SPI, GPIO interfaces • 2 SDIO3.0 interfaces - SDIO0 supports SDXC cards, with a maximum capacity of 2TB - SDIO1 supports connecting to WiFi modules • 2 USB3.0/USB2.0 interfaces - USB0 is Host only - USB1 is Host/Device switchable • 2-Lane PCIe2.0 high-speed interface - Supports RC/EP mode - Can be configured as 2-Lane PCIe2.0 - Can be configured as 1-Lane PCIe2.0 + USB3.0

External Memory Interface
• DDR4/LPDDR4/LPDDR4x interface - Supports 4 x 16bit DDR4 - Supports 2 x 32bit LPDDR4/LPDDR4x - DDR4 maximum rate 3200Mbps - LPDDR4/LPDDR4x maximum rate 3733Mbps - Maximum capacity 8GB • SPI Nor/SPI Nand Flash interface - Supports 1, 2, 4-wire modes - SPI Nor Flash supports 3Byte and 4Byte address modes • NAND Flash interface - Supports SLC and MLC asynchronous interface devices - Supports 2/4/8/16KB page sizes - Supports 8/16/24/28/40/64bit ECC (in 1KB units) • eMMC5.1 interface, maximum capacity 2TB • Boot from eMMC, SPI Nor/SPI Nand Flash, NAND Flash or PCIe slave chip can be selected

SDK
• ARM CPU supports Linux SMP • DSP/MCU supports LiteOS

Chip Physical Specifications
• Power consumption - 5.2W typical power consumption (4K30 + 4Tops) • Operating voltage - Core voltage 0.8V - IO voltage 1.8/3.3V - DDR4/LPDDR4/LPDDR4x interface voltages are 1.2/1.1/0.6V respectively • Package form - RoHS, FC-BGA 23mm x 23mm package - Pin pitch: 0.65mm

III. 21AP10 Core Board Interface Circuits


IV. FAQ

Question Answer
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