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HiSiliconHI3518EV200Encoder Boardwith4Gvariant

Dev Boards & Modules · HiSilicon

Project: Board Introduction | page_id: 1323

Product Introduction

Board Size: 85*65mm

Chip Specifications

Features
·ARM926@550MHz;
·1280x960@30fps or 1920x1080@15fps H.264 HP encoding;
·Max.2M Pixel sensor input;
·Digital WDR, Tone mapping;
·64MB / 32MB integrated DDR.
- HiSilicon Hi3518EV200 is a SoC (System on Chip) designed specifically for IP cameras, with a number of advanced functions and optimized designs

Main parameters and functions
Video processing capability:
Supports H.264 encoding, with a maximum supported resolution of 2M Pixel, and frame rate support of 1/16~30fps
Supports H.265 encoding and MJPEG encoding, with a maximum resolution of up to 1080*1920
Integrates a new generation ISP (image signal processor), optimizes the image processing algorithm before encoding, and provides better image quality
Interfaces and storage
Supports 8/10/12/14bit RGB Bayer input, with a clock up to 100MHz
Provides 4-channel MIPI / Hispi / LVDS interfaces
Embedded 512M*16bit DDR2, up to 360MHz
Integrates DRAM, POR, RTC, AudioCodec, Sensor level shifting and various clock outputs
Power consumption and compatibility
Adopts advanced low-power process and internal low-power architecture design, with a typical power consumption of 700mW
Compatible with the SDK design of HiSilicon DVR/NVR chips, facilitating fast product mass production and system layout
Other functions:
Supports 3D noise reduction, image enhancement, edge enhancement, anti-flicker processing for video output, and 3A functions (strong light suppression, backlight compensation, gamma, color enhancement)