KM01A-ZD3336 AOV Board Specification

1 Overview

1.1 What is AOV

AOV (Always On Video) is the mainstream technology route for solar-powered low-power cameras. Unlike a conventional PIR-triggered camera (“PIR senses a person → wakes the SoC → starts recording”), AOV instead keeps the video path always on at low power, runs scene analysis locally on the on-board NPU, and only raises the recording profile and wakes the wireless uplink once a valid target has been confirmed.

The cost has to be stated clearly: AOV draws more continuous power than a PIR wake-up design, so it places higher demands on solar panel wattage, battery capacity and charge/discharge management — which is exactly why the power path, RTC wake source and TF card write policy of an AOV board are the core of any product design.

1.2 Where this board sits in an AOV product

The KM01A-ZD3336 is the main control board of an AOV 4G PTZ camera: it carries all computing, networking, storage and PTZ control, and interfaces with the rest of the product through MIPI / pin headers, the TF socket, motor connectors, the battery connector, the 4G antenna connector and the mechanical parts.

Low-power always-on + event upgrade: the built-in NPU of the KM01 analyses the scene locally, so the full video stream never has to go to the cloud;

Day/night switching loop: IR-cut filter switching + white-light fill PWM + infrared fill light, all scheduled by the SoC;

Solar power loop: battery charge/discharge interface + charge enable + resistive-divider battery sampling (AIN0), working with an external solar panel and charge IC;

Cable-free networking: a 4G Cat.1 bis module is soldered straight onto the board and event clips are sent back over LTE;

Local storage: the TF socket takes large-capacity high-endurance cards for continuous writing;

PTZ control: dual H-bridges drive the horizontal / vertical DC motors directly, with no external driver board.

1.3 Key specifications at a glance

2 AOV operating modes and power state machine

This is where an AOV board differs most from an ordinary IPC board. The product firmware schedules the state machine below, and on the hardware side each state switches a different set of modules on this board on or off.

Three hardware constraints behind this state machine(mandatory for any product design):

1. Wake-up must be interruptible by a hard-wired PIR line. IR (GPIO68) on J15 is that path: the PIR output pulls the GPIO directly to wake the SoC from deep sleep, with no dependency on the 4G module being online.

2. The 4G module and the main controller must save power independently. The ML120H supports power-off (55 uA), sleep (0.41 mA) and standby (5.64 mA); only together with the SoC sleep policy does AOV battery life become possible.

3. TF card writing is a continuous load. Continuous AOV writing requires a high-endurance (surveillance-grade) card; ordinary cards wear out quickly under constant writing.

3 Board basics

4 Interface definition

4.1 Interface overview

4.2 How the key AOV interfaces are split

The main functional blocks of an AOV product map onto this board as follows:

4.3 Pin definition details

J13 5V POWER (2P / 2.00mm)

J9 DEBUG (3P / 1.25mm)

J15 GPIO (2P / 1.25mm)

J1 MIC (2P / 1.25mm)

J11 AUDIO (2P / 1.25mm)

CON5 IRCUT (2P / 1.25mm)

J8 BOOT (2P)

CON6 MOTOR_1 (5-pin / Molex 53398, horizontal)

CON8 MOTOR_2 (5-pin / Molex 53398, vertical)

J5 BAT CHRG_EN (5P)

J10 AK_USB (4P)

J12 MIPI / I2C0 / CSI2 (26P)

J4 4G_ANT (IPEX)

J3 TF Card (Micro SD, XKTF-015-G)

5 Main controller specifications (KM01)

The KM01D and KM01N chips are designed for smart terminals such as IoT cameras and fit a wide range of AIoT scenarios including object detection, object tracking, face recognition and intelligent video surveillance. Built around an ARM926EJ-S core, they integrate a neural processing unit (NPU), an image signal processor (ISP) and H.265/H.264 video encoders, delivering high-quality image processing and high-compression video encoding while keeping power consumption low. Both chips support secure boot to protect firmware integrity and runtime safety. UART, TWI, SPI, I2S, MMC/SD/SDIO, Ethernet MAC and USB 2.0 peripherals make them highly extensible and easy to adapt to a wide variety of end products.

6 4G module specifications (ML120H)

In an AOV design the 4G module is the biggest power consumer and the component that implements the “send clips only, never the whole stream” policy. The board carries a Cat.1 bis module rather than Cat.4 — enough bandwidth for clip upload.

Selection note: Cat.1 uplink bandwidth is limited (FDD 5 Mbps / TDD 1 Mbps), so AOV event clip upload has to use H.265 with a key-frame-first policy — do not design for “uploading the full stream”. TDD bands only give 1 Mbps uplink, so if the deployment area has TDD coverage only, the upload bitrate ceiling must be lowered further.

⚠ Model uncertain (must be confirmed before shipment): the π matching network in the schematic 4G antenna circuit is labelled ML120H le270-cn, but these two names refer to Cat.1 modules from two different vendors — the ML120H comes from Xiamen Cheerzing IoT (HiSilicon Hi2131 platform, 15.8 × 17.7 × 2.2 mm) and the LE270 from Fibocom (17.7 × 15.8 × 2.4 mm). The two are very close in size, bands and interfaces, so a single line in the schematic is not enough to tell which one is actually fitted.This table is filled in for the ML120H; if the part is actually an LE270, the bands (B1/3/5/7/8/20/28) and the supply limit (4.5 V) have to be corrected accordingly. Before shipment confirm against the silkscreen on the actual module or the BOM, and update this table to match.

7 Interface circuit notes

5V POWER (J13)

2.00 mm pitch SMD connector (ph-2P-2_00-smd); V_SYS is decoupled by a 470 uF/10 V capacitor (C3) before feeding the system.

DEBUG (J9)

UART0_RXD / UART0_TXD each run through a 100 Ω series resistor (R24 / R52) before leaving the board; 3-pin / 1.25 mm SMD connector, GND straight to ground.

TF Card (J3)

Socket model XKTF-015-G; six signals are brought out, data and command each with a 0 Ω series resistor and a 10K/1% pull-up; power is fed through R50 (100R) with 100 nF + 10 uF decoupling. Continuous AOV writing requires a high-endurance TF card.

GPIO (J15) — PIR wake-up and white-light fill

PIN1 = IR (PIR human infrared sensing), PIN2 = WL (white light); GPIO68 → IR and GPIO67 → WL, each through a 100 Ω series resistor. IR is the main wake source of the product and does not depend on 4G being online.

MIC (J1)

MIC_P / MIC_N differential input; the analog supply VCM3 is filtered by R108 (1K); bias resistors R105 / R106 (1.2K/1%); both lines leave the board isolated through beads FB3 / FB4 (300R / 0.5 A).

AUDIO (J11)

Uses an XA8002E (SOP8) amplifier; mute control SPK_EN; the differential HPOUT input runs through C402 (1 uF/6.3 V) plus the R402 (20K/1%) and R23 (100K/1%) bias network.

MOTOR (CON6 / CON8)

Two independent H-bridges: CON6 is horizontal (H_MB1~H_MB4) and CON8 is vertical (V_HB1~V_HB4); the drive supply is MOTOR_5V; the connectors are Molex 53398 5-pin / 1.25 mm.

BOOT (J8) and SPI flash

The SPI flash is a GD250Q128ESIG (128 Mbit); shorting BOOT starts MASS BOOT mode, and releasing the button boots normally from SPI flash. In production confirm that the jumper is not fitted.

BAT CHRG_EN (J5) — solar power and battery level sensing

Brings out VBUS / GND / V_SYS / CHRG_EN / BAT+; CHRG_EN leaves the board through R34 (100R); BAT+ is divided by R29 / R33 (100K each) and sampled on AIN0. This board does not include a charge IC.

MIPI / I2C0 / CSI2 (J12) — image input and fill-light dimming

Three MIPI differential pairs (MIPI_DP3/DN3, DP4/DN4, DP5/DN5); I2C0_SDA / I2C0_SCL are shared with CSI2_SCLK and CSI2_RST/I2C2_SDA; CSI1_PWM is used for fill-light PWM dimming.

4G_ANT (J4)

4G module ML120H (le270-cn); IPEX antenna connector, the RF trace runs through π matching to ANT_MAIN; the module has its own VDD_3V3 supply. The RF trace must hold a strict 50 Ω characteristic impedance.

CONFIG_KEY (reset button)

Button model KH-3635-CAJ (SMD system reset button); CONFIG_KEY is pulled up to VDD_3V3 through R19 (1K) and pressing it pulls the line low to trigger a reset.

IRCUT (CON5)

Two outputs IROA / IROB with C106 (100 nF/25 V) across them for filtering; 2-pin / 1.25 mm SMD connector. Filter switching must be linked to the fill light and needs a debounce delay.

AK_USB (J10)

AK_DP / AK_DM USB 2.0 data pair; V_SYS feeds VUSB through D6 (DSK24 SOD-123); 4-pin SMD connector with ESD protection.

8 Key bill of materials (BOM extract)

9 AOV external parts list

The board itself does not include the following parts; a product design has to add or select them:

10 Design notes

Battery life is a product parameter, not a board parameter: the board only provides the power interface and battery sampling. Real battery life comes from the solar panel wattage, battery capacity, charge/discharge policy, fill-light policy and recording duration together — always work out the power budget before quoting or discussing a project.

Power priority: 4G transmit > PTZ rotation > white-light fill > encoding and writing > always-on AI inference > deep sleep. When power runs short, cut from the back of this list forward and the core recording capability survives.

The always-on policy needs profiles: offer at least three profiles — “maximum saving / balanced / HD recording” — and let users pick per scenario (a busy doorway vs a backyard) instead of one fixed setting for everything.

Sleep and wake leakage current: in PIR standby the static leakage of the SoC and the 4G module sets the ceiling for “never runs out”; the module must really enter power-off / PSM rather than just network idle.

This board has no RTC: no standalone RTC chip is present on the board. If the product needs timed capture or timed upload while offline, add an external RTC on I2C, or rely on 4G network time (which stops working when offline).

Disable the charge IC before sensing battery level: the schematic states this explicitly — if the charge IC is not disabled, the divider reading is distorted.

The divider ratio needs calibration: R29/R33 = 100K/100K (1:2); at a full charge of 4.2 V, AIN0 sits at about 2.1 V, which is outside the usual ADC range, so the firmware must be calibrated against the real reference voltage and divider ratio.

The solar panel must have reverse-polarity and over-voltage protection: otherwise a rainy day or a reversed connection will burn the charge IC and then damage this board.

BOOT jumper: shorting J8 enters MASS BOOT programming mode; production firmware must confirm the jumper is not fitted, otherwise the board cannot boot from SPI flash nor be upgraded remotely.

MIPI differential pairs: they must be length-matched with continuous impedance and no vias or layer changes inside a pair; pins 8/9 and 16/17 can be cut directly to isolate debug segments.

Motor driver: H_MB/V_HB are H-bridge outputs and the motor is an inductive load; MOTOR_5V and the system 5 V must be decoupled separately, and the harness must stay away from the MIC and MIPI traces.

4G antenna and supply: the RF π matching must not be changed; transmit bursts draw large current, so leave headroom in the VDD_3V3 supply path and bulk capacitor.

TF card power: fed through R50 (100K) in series — check the voltage drop with fast high-capacity cards and move to a lower resistance if needed.

The pain point of AOV is “install it and nobody touches it again”: the device sits high up outdoors, so remote upgrade (4G FOTA), remote parameter change and remote reboot all have to be complete — otherwise every field issue means a site visit.

The TF card needs life monitoring: the firmware should read card health / bytes written and warn as end of life approaches; for PTZ cameras use cyclic overwrite rather than unlimited growth.

The battery needs health reporting: the product must report battery level, charging state and low-battery alarms to the cloud — once the battery fails, an AOV device goes offline completely.

Event clips and live preview need tiered throttling: Cat.1 uplink bandwidth is limited, so cap the concurrency and duration of live preview and give event upload priority.

11 Parameters still to be confirmed

The following items are not provided in the vendor documentation and must be filled in before the official external release: