GK7205SingleEconomyHDMIEncoder

Project: Board Introduction | page_id: 1172

Product Images

Board Size: 110*83mm

Chip Specifications

Processor Core
＊ ARM Cortex A7@ 900MHz, 32KB I-Cache, 32KB DCache / 128KB L2 cache
Video Encoding
＊ H.264 BP/MP/HP, supports I/P frames
＊ H.265 Main Profile, supports I/P frames
＊ MJPEG/JPEG Baseline encoding
Video Encoding Processing Performance
＊ H.264/H.265 encoding supports max resolution 2688x1520/2592x1944, max width 2688
＊ H.264/H.265 multi-stream real-time encoding capability:
− 2048x1536@30fps+720x576@30fps
− 2304x1296@30fps+720x576@30fps
− 2688x1520@15fps+720x576@15fps
− 2592x1944@15fps+720x576@15fps
＊ Supports JPEG snapshot 4M (2688x1520)@5fps / 5M (2592x1944)@5fps
＊ Supports CBR/VBR/FIXQP/AVBR/QPMAP/CVBR six rate control modes
＊ Supports intelligent encoding mode
＊ Max output bitrate 60Mbps
＊ Supports 8 regions of interest (ROI) encoding
Intelligent Video Analysis
＊ Integrated IVE intelligent analysis acceleration engine
＊ Supports intelligent motion detection, perimeter protection, video diagnosis and other intelligent analysis applications
ISP
＊ Supports 4x4 Pattern RGB-IR sensor
＊ 3A (AE/AWB/AF), supports third-party 3A algorithms
＊ Fixed pattern noise removal, bad pixel correction
＊ Lens shading correction, lens distortion correction, purple fringe correction
＊ Direction adaptive demosaic
＊ Gamma correction, dynamic contrast enhancement, color management and enhancement
＊ Region adaptive defog
＊ Multi-level noise reduction (BayerNR, 3DNR) and sharpening enhancement
＊ Local Tone mapping
＊ Sensor Built-in WDR
＊ 2F-WDR frame mode
＊ Digital image stabilization
＊ Supports intelligent ISP adjustment, provides PC-side ISP tuning tools
Audio Codec
＊ Multi-protocol voice codec implemented by software
＊ Protocols support G.711, G.726, ADPCM
＊ Supports audio 3A (AEC, ANR, AGC) functions
Security Engine
＊ Hardware implementation of AES/RSA multiple encryption and decryption algorithms
＊ Hardware implementation of HASH (SHA1/SHA256/HMAC_SHA1/HMAC_SHA256)
＊ Internal integration of 32Kbit one-time programming space and random number generator
Video Interfaces
＊ Input
− Supports 8/10/12bit RGB Bayer DC timing video input, supports BT.1120 input
− Supports MIPI, LVDS/Sub-LVDS, HiSPi interfaces
− Supports connection with mainstream HD CMOS sensors from SONY, ON, OmniVision, Panasonic, etc.
− Compatible with various sensor parallel/differential interface electrical characteristics
− Provides programmable sensor clock output
− Supports max input resolution 2688x1520/2592x1944
＊ Output
− Supports 6/8/16bit LCD output
− Supports BT656/BT1120 output
Audio Interfaces
＊ Integrated Audio codec, supports 16bit voice input and output
＊ Supports dual-channel mic/line in input
＊ Supports mono line out output
＊ Supports I2S interface, supports connecting external Audio codec
Peripheral Interfaces
＊ Supports POR
＊ Integrated high-precision RTC
＊ Integrated 4-channel LSADC
＊ 3 UART interfaces
＊ Supports I2C, SPI, GPIO and other interfaces
＊ 4 PWM interfaces
＊ 2 SDIO2.0 interfaces
＊ 1 USB 2.0 HOST/Device interface
＊ Integrated FE PHY; supports TSO network acceleration
＊ Integrated PMC standby control unit
External Memory Interface
＊ SDRAM interface
− Built-in 1Gbit DDR3L
＊ SPI NOR Flash interface
− Supports 1, 2, 4-wire modes
− Max capacity 256MB
＊ SPI NAND Flash interface
− Supports 1, 2, 4-wire modes
− Max capacity 1GB
＊ Supports eMMC5.0 interface
− 4/8bit data width
SDK
＊ Provides SDK package based on Huawei LiteOS/Linux-4.9
＊ Provides high-performance PC decoding library for H.264
＊ Provides high-performance PC, Android and iOS decoding libraries for H.265
Chip Physical Specifications
＊ Power consumption
− 1W typical power consumption in 3M30/4M15 scenarios
＊ Operating voltage
− Core voltage 0.9V
− IO voltage 3.3V (+/-10%)
− DDR3L SDRAM interface voltage 1.35V
＊ Package
− 12mm x 13.3mm, 279pin 0.65mm pin pitch, TFBGA package

Interface Circuits

Power

Audio Input

Audio Output

HDMI Loop-in

Network Port

RS485

Serial Port

SD Card

FAQ